In semiconductor processing of bipolar transistors, it is frequently desirable to implant a low-resistance buried layer below the active area of the transistor, effective to reduce the resistance of the transistor collector and to improve the frequency response of the desired bipolar transistor at high-collector current by limiting high-current base pushout. According to the prior known techniques, the dopant applied to the buried layer is generally introduced by implantion of high energy ions of the selected dopant into the silicon crystal. After a diffusion step to distribute the dopant to its final configuration within the silicon crystal, a new layer of silicon is epitaxially deposited to form a region having a resistivity suitable for forming the active area of the bipolar transistors to be fabricated. Unfortunately, the ion implantation step discussed immediately above seriously disturbs the crystalline perfection of the underlying silicon. Even including an anneal step which is effective to restore a substantial amount of the previous crystalline formation does not restore the silicon surface to its former level of perfection. The imperfections produced in the underlying crystalline surface will unfortunately be replicated into the crystalline structure of the epitaxially deposited silicon. These imperfections, to the extent they lie in the active area of a bipolar transistor, can result in devices which leak current and have a tendency to short circuit. A known approach to address the problem of such imperfections in the crystalline structure is to oxidize away the affected imperfect silicon layer after fabrication of the buried layer is completed. The oxide itself is then finally etched away prior to epitaxial growth of a new, more perfect silicon layer. In succeeding steps, the active transistor is then accurately aligned over the buried layers described above.
A depression is desirably formed in the silicon at the location of the buried layers to mark where the subsequent masking steps are placed. One approach is the local oxidation approach, according to which a layer of Si.sub.3 N.sub.4 is applied to prevent surface oxidation except in the region of the buried layer windows where the nitride has been etched away. If the implant range is at about 1,500 angstrom beneath the surface of the crystal, over 3,000 angstrom of oxide will have to be oxidized to completely remove the implanted material. As a result, a depression of about 1,500 angstrom in depth will remain in the silicon. This local oxidation scheme also causes a great deal of damage to the buried layer windows themselves due to the growing oxide trying to expand against the rigid nitride film. This may also cause crystalline damage to the silicon which is replicated onto the epitaxially grown silicon layer.
Another approach which is known to enable creation of desired topographies on the surface of a silicon wafer includes applying a thick layer of initial oxide and to etch windows in the thick oxide where the buried layers are to be placed. It is through the windows extending through this oxide material that implantation is accomplished. When the implant damage is oxidized away and the alignment topography has been established, a thick oxide layer is grown in the bare buried layer windows. The oxidation of silicon under the thick oxide is inhibited, because the oxidizing species slowly have to diffuse through the thick oxide already present. Thus more silicon is oxidized away in the window area than in the areas under the thick oxide. After this oxide is removed before the epitaxial deposition described above, a depression is left in the silicon at the locations of the windows. This known approach is workable, but it is also disadvantageous, in part because the depth of the resulting topography, which is established in the silicon surface, is coupled to the oxide grown after implant. During processing, these thicknesses are balanced only with difficulty. Further, the process is complicated and time-consuming, requiring extensive oxidation steps. Additionally, because the oxide grows more thickly in the selected windows, differential stresses are created which can lead to wafer warpage and crystal imperfections unless thermal handling is carefully done.
It is accordingly an object of the invention herein to develop an approach to establishing the desired, doped active implanted region, and to ensure a highly perfect crystalline structure in the active region which is not subject to leakage currents and short circuit burdens.
Further, it is an object of the invention to localize the position of the doped region for further, suitably aligned semiconductor processing steps to be followed in device manufacture.
Additionally, it is desired to accomplish the above with a minimum in topographical variation. This is desired to avoid difficulties with critical dimensions of the devices under manufacture and fabrication, and further to ensure control of the exact size and dimensions of critical features. With too much topographical variation, undesired etching problems may arise during subsequent processing steps during fabrication.
Finally, it is desired to develop an approach to elimination of crystalline defects which is effective for removing substantially all desired defective regions without carving out an excessive amount of silicon and leaving extreme topographical depressions in the silicon surface which might detrimentally affect subsequent processing steps.